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How to Implement a 64B PCIe* Burst Transfer on Intel® Architecture

White Paper: How to implement a 64B PCIe* burst transfer on Intel® architecture using cache attributes and fence instructions. (v.001, Feb. 2013)

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Opening New Horizons: 14 nm Process Technology

Explore Mark Bohr's presentation on the new 14 nm transistor process and how the improved tri-gate fin design enables greater computing experiences.

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Enhanced MCA Logging in Future Intel® Xeon® Processors

White Paper: Provides usage models, software flows, and reporting mechanisms for enhanced MCA logging and I/O MCA in future Intel® Xeon® processors.

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Intel® 64 Architecture

Intel® 64 architecture expands addressable memory to over 4 GB by enabling 64-bit computing in embedded designs, improving performance.

Intel® Architecture Leads the Microarchitecture Innovation Field

Intel® architecture innovations are the foundation of Intel's business model and success.

Migration Solutions for Embedded Intel® Architecture

Klocwork analyzes source code and inspects codebase before Intel® architecture migration, minimizing cost, effort, and complexity. (v.1, Oct. 2011)

Basics of Building Intel® Architecture Design

White Paper: Describes elements of Intel® architecture design, including voltage regulators, clock sources, and power sequencing. (v.1, Sep. 2010)

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Platform-Level Error Handling Strategies for Intel® Systems

White Paper: Provides platform-level error handling strategies and overview of error detection and notification capabilities. (v.1, May 2011)

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Debugging Processor Reorder Buffer Timeout: Guide

Guide: Describes processor reorder buffer timeout and provides methodology for debugging these types of system issues. (v.1, Oct. 2010)

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Reduce Interrupt Latency in Embedded Systems

White Paper: MSI remove limitations associated with Intel® architecture, reduce interrupt latency and overhead, improving performance. (Jan. 2009)

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